Fast and accurate detection of symmetrical components is critical for ride-through of asymmetrical faults in grid-forming (GFM) inverter based resources (IBRs). Sequence-decomposed GFM control enables to emulate the behavior of a synchronous machine by an IBR in both positive- and negative-sequences, where current references are generated separately in each sequence from the extracted symmetrical components of the terminal voltage. Cross-coupled dynamics between the stationary frame components attributed by the symmetrical component extraction (SCE) complicates the analysis and design process. In this work, a small-signal model is developed for the analysis and design of such sequence-decomposed GFM control.  It is demonstrated that by virtue of its overall structure, sequence-decomposed GFM control enables simplified analysis eliminating the cross-coupled dynamics characteristic to SCE. Subsequently, comparative analysis is presented between delay based and filter based SCE methods focusing on their impact on small-signal stability. Design guidelines are provided along with supporting experimental evidence using a laboratory inverter prototype.

As the number of converter-interfaced distributed energy resources connected to the power system continues to increase rapidly, recent grid codes require these grid-tied converters to maintain grid connection during fault to ensure power supply security and reliability. In this work, we analyze the oscillation in the injected real and reactive power that a grid-tied voltage source converter (VSC) introduces as it attempts to contribute to the power quality and improve the voltage at the point of common coupling (PCC) during an asymmetrical fault. We propose a new double sequence current reference generation method that can be utilized to derive a closed-form quantifiation of the peak value of both the real and reactive power oscillation during asymmetrical fault ride-through (AFRT) analytically. Effect of the resulting bus voltage oscillation and ripple current requirement at twice the grid frequency, corresponding to the real power oscillation, on the input DC bus capacitor and upstream converter is analyzed for facilitating system component sizing. Furthermore, the proposed current reference generation formulation helps control the negative sequence current injection during fault to assist with fault identifiation. The theoretical analysis is validated through simulation in PLECS for both asymmetrical and symmetrical fault scenarios. Experimental results for a three-phase, grid-tied VSC operating under both asymmetrical and symmetrical faults are provided to evaluate the performance of the proposed current reference generation method and validate the analysis presented.

A double synchronous unified virtual oscillator controller (dsUVOC) is proposed for grid-forming voltage source converters to achieve synchronization to the fundamental frequency positive- and negative-sequence components of unbalanced or distorted grids. The proposed controller leverages a positive- and a negative-sequence virtual oscillator, a double-sequence current reference generator, and a double-sequence vector limiter. Under fault conditions, the controller enables to clamp the converter output current below the maximum value limited by the converter hardware while retaining synchronization without a phase-locked-loop (PLL) regardless of the balanced or unbalanced nature of grid faults. Consequently, balanced and unbalanced fault ride-through can be achieved without the need for switching to a back-up controller. The paper presents the systematic development of the double-synchronous structure along with detail design and implementation guidelines. Validation of the proposed controller is provided through extensive control-hardware-in-the-loop (CHIL) and laboratory hardware experiments.