deletions | additions       diff --git a/Part C: Timer B ISR with RTOS.tex b/Part C: Timer B ISR with RTOS.tex  index 17eae56..17e1123 100644  --- a/Part C: Timer B ISR with RTOS.tex  +++ b/Part C: Timer B ISR with RTOS.tex 
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The main purpose of this procedure is to develop a program that counts Timer B interrupts and displays the interrupt overhead and after a RTOS program with the same functionalities added to the simulation of a PWM signal with a LED.  Appendix C shows the program code without RTOS with the proper special timer function register set up. Appendix D shows the program code with RTOS.  This program uses the same structure of Part B: B with one event for a timer semaphore and two tasks and four simple procedures as follow:  * TaskStart(): Task  function TaskStart() that  startup other tasks and update screen with its void TaskScreenUpd(void *data); // Function prototype of task to update task's statistic;  * TaskScreenUpd(): Task function that updates  screen void InitTimerInt(); // Setup with  Timer B interrupts void Tmr_B_isr(); // and overhead;  * InitTimerInt(): Procedure setup  Timer B interrupt service routine  void UpdateStat(); // Display interrupts;  * Tmr_B_isr(): Procedure holds the IISR;  * UpdateStat(): Procedure update  RTOS statistics  void DispStr(int x, int y, char *s); statistics;  * DispStr(): Procedure set the STDIO cursor location and display a string in the screen.  All Timer B interrupts special function register  were set correctly properly  to enable its clock with perclk/16, priority 1, and B1 count register of 0x15E, as required. The IISR reads the timer counter, increments the necessary variables, post the semaphore when the count reaches 1000 in order to inform the function TaskScreenUpd() that updates screen with the number of interrupts happened and the timer overhead. This last value is calculated by the difference of the timer counter and the count register predefined. As the Rabbit 2000 is a 8-bit microprocessor \cite{Digi_International_2007}, the 10-bit Timer B count is divided into two 8-bit timer counts: TBCMR 2 MSBs and TBCLR 8 bits, one after another. Because of this, if one of these counters is read after the other, it can be changed between this process. Thus, to calculate correctly this combined value, TBCLR is read, then TBCMR, and after TBCLR again to check if there is any change in its MSB. If there is, TBCMR is decreased. Finally, the timer counter value Timer_B_value is set with the value of TBCLR summed to TBCMR shifted 2 bits to the left.