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Alec Aivazis added abstracta.tex
over 9 years ago
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Lab 3 introduced us to digital counters, an extremely useful digital component for timing and other applications. We also covered how one can use Quartus in order to simulate the behavior of the circuit before writing it to the FPGA. The simulator is able to compute the various delays to ensure that the FPGA will perform as expected. We also covered the implementation of binary-coded decimal counters to provide a digital timer that was sensitive to hundredths of a second. The last part of this lab involved creating a 4 bit counter that incremented once a second using only elementary gates and D-flops. This lab was extremely useful in understand the implementation of various counters that can be used to output the value of a particular binary number or the time shown on a clock.
