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Alec Aivazis edited figures/1.9/caption.tex
over 9 years ago
Commit id: a347362af8b6251eb15111b63cd0d9743e1b3efc
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\label{fig:1.3} Section 1.3 covered how one uses Quartus to implement various logic gates in Quartus. First I wired the first two inputs (SW[1,0]) to a NAND gate and displayed the result on the first red LED. Then, I constructed an OR gate out of NANDS and verified the logic using the second red LED on the FPGA. Afterwards, I implemented XOR logic using 4 NAND gates and hooked up the output to the third red led on the board. Finally, I used two more DIP switches to make a 4 output decoder that matched the intended truth table and verified it using 4 more LEDs on the FPGA.