Camil Demetrescu edited osr-llvm.tex  over 8 years ago

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\fi  \paragraph{x86-64 Lowering.}  The final step to be performed before execution is native code generation. \myfigure\ref{fig:isordx86-64} shows the x86-64 code generated by LLVM for {\tt isordfrom} and {\tt isordto}. For the sake of comparison with the native code that would be generated for the original non-OSR versions, additions resulting from the IR instrumentation are in grey, while removals are struck-through. Notice that the OSR intrusiveness in {\tt isordfrom} is minimal, consisting of just two assembly instructions with register and immediate operands. As a result of induction variable canonicalization in the LLVM back-end, loop index {\tt i} and hotness counter {\tt p.osr} are fused in register {\tt\%r12}. We also note that tail call optimization is applied in the OSR-firing block, resulting in no stack growth during an OSR.  \subsection{Instrumentation API}  \label{se:instrum-api}