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Chris Spencer added The_technology_in_the_world__.tex
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The technology in the world as we know it is getting smaller and smaller with advances in Nanotechnology. Advances in this field has advanced Moore’s law to the point of bottleneck. Therein lies the problem that engineers need to solve in order to continue to squeeze what juice is left in Moore’s law. The logical direction is to work with what we already have and search for new ways for improvement. What we do have as a basis that must be used for integration is silicon. The industry is built on using silicon as the platform for our electronics. So there must be effort put into monolithic integration of improved technology. Monlithic integration meaning fabricating components that can be used directly witch silicon such as grown with silicon or in the same process on a factory line. Silicon Photonics can offer a cost effective but high performance optical interface solutions and important in short-reach applications [12]. Photonic integration on chip has long been envisioned as a promising solution to the interconnect bottleneck on chip[17]. In order to achieve s silicon photonic platform, there is a need for a device to that can turn optical information to electrical signals.
\section{Germanium on Silicon}
Silicon has a large bandgap, the energy needed to go from from the valence band to the conduction band, so silicon is not efficient for photodetection of wavelengths of $1.3-1.55 \mu m$ used in optical fiber communication [12]. A common way to work with issue is to introduce a material with a smaller bandgap such as Germanium. This is difficult to epitaxially grow Ge on Si due to a $4.2\%$ lattice mismatch between the two [2]. These are issues due to high surface roughness and high density of threading dislocations in Ge epitaxial layer . For efficient integration with Si electronics, it is required that CMOS devices have planar processing which surface roughness affects and threading dislocations affect recombination that is introduced at dislocations. Thankfully there are fabrication process's that are used to combat these problems. Annealing is normally done to decrease treading dislocation densities [2]. In considering a Ge on Si device, a discussion of how the band structure can change due to growth of Ge on Si and specifically how tensile strain effects bandgap. Germaniun has an indirect bandgap of 0.664 V at the L valley and a direct gap of 0.800 eV at the $\Gamma$ valley [12]. Biaxial tensile stress has the effect of shrinking both indirect and direct bandgaps but the direct gap shrinks faster. Under this stress, Ge can be transformed from a indirect gap material to a direct gap material [12]. This stress is then wanted for optimal performance of a Ge device on silicon.
