One of the most important remaining issues faced by the silicon photonics community is the on-chip laser source. The potential solution falls into two categories. The direct solution for this issue is making lasers based on epitaxial growth on silicon, and the hybrid solutions is realized by the the integration of silicon photonics chips with III-V epitaxy on laser chips. The direct solution has challenges of material limitations, while the hybrid solution can take advantages from the mature fabrication processes for the high quality silicon photonics chips and the VCSELs. Enormous progress has been made in VCSEL technology in the past two decades, with various successful attempts at hybrid integration of VCSELs to various carrier substrates \cite{krishnamoorthy1999vertical,mathine1996reduction,yeh1994integration}. The flip-chip bonding technique has been used to bond both single VCSEL \cite{krishnamoorthy1999vertical} and VCSEL arrays to CMOS chips \cite{krishnamoorthy200016}. However, flip-chip bonding of VCSELs with silicon photonics chips is more challenging than the bonding of VCSELs with CMOS chips. High alignment accuracy is required during the bonding process and the output from the VCSEL need to be aligned to the vertical grating coupler on the silicon photonics chip. In this paper, we demonstrate the integration of 2x4 VCSEL \cite{hofmann20091} array with silicon photonics chip using the flip-chip bonding technique, with custom designed vertical grating couplers as the input/output interfaces. The schematic of the bonding structure is shown in Fig. \ref{schematic}.
One of the most important remaining issues faced by the silicon photonics community is the on-chip laser source. The potential solution falls into two categories. The direct solution for this issue is making lasers based on epitaxial growth on silicon, and the hybrid solutions is realized by the the integration of silicon photonics chips with III-V epitaxy on laser chips. The direct solution has challenges of material limitations, while the hybrid solution can take advantages from the mature fabrication processes for the high quality silicon photonics chips and the VCSELs. Enormous progress has been made in VCSEL technology in the past two decades, with various successful attempts at hybrid integration of VCSELs to various carrier substrates \cite{krishnamoorthy1999vertical,mathine1996reduction,yeh1994integration}. The flip-chip bonding technique has been used to bond both single VCSEL \cite{krishnamoorthy1999vertical} and VCSEL arrays to CMOS chips \cite{krishnamoorthy200016}. However, flip-chip bonding of VCSELs with silicon photonics chips is more challenging than the bonding of VCSELs with CMOS chips. High alignment accuracy is required during the bonding process and the output from the VCSEL need to be aligned to the vertical grating coupler on the silicon photonics chip. In this paper, we demonstrate the integration of 2x4 VCSEL \cite{hofmann20091} array with silicon photonics chip using the flip-chip bonding technique, with custom designed vertical grating couplers as the input/output interfaces. The schematic of the bonding structure is shown in Fig. \ref{schematic}.