The designed vertical grating coupler has a grating period of 575 nm with a duty cycle of 0.7. The bidirectional vertical grating coupler arrays have been fabricated using electron beam lithography. The fabrication used silicon-on-insulator substrate with 300 nm silicon on 2 um buried silicon dioxide layers. The substrates were 25 mm squares diced from 150 mm wafers. Each arm of the vertical grating coupler is connected to its own output (detuned) grating coupler. Bond pads were designed for the silicon photonics chip matching the dimensions of the VCSEL pads. Metal wires are used on the silicon photonics chip to connect the bond pads to corresponding driving pads far away from the bond pads (Fig. 2(b)). Therefore, when the VCSEL is flip-bonded to the silicon photonics chip, we can use the driving pads on the silicon photonics chip to drive the VCSEL.
Bonding process goes here..... to do...
The comparison of the V-I and L-I curves of a VCSEL, before and after bonding, are shown in Fig. 3. It can be seen from Fig. 3(a) that the driving voltages of the VCSEL increased after bonding to the silicon photonics chip, which is caused primarily by the additional resistance from the pads and metal wires on the silicon photonics chip. The red crosses shown in Fig. 3(b) denote the measured power after bonding. Increasing driving current was applied to the driving pads on the silicon photonics chip and a large area detector was used to measure the output power. A reference loop including a pair of the output grating couplers were measured and the loss from the output grating coupler has been calibrated in Fig.3(b). The mismatch between L-I curves before and after bonding mainly comes from the bidirectional vertical grating coupler. The fabrication error of the grating coupler is the first source and the offsets between the VCSEL and the vertical grating coupler is another source that may cause the extra loss.