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**CAD2 Exercise Report**

**Muhammad Ammad Siddique (Student No: 547767)**

**Ali Saleem (Student No: 547657)**

**Pre-Exercise**

**First Phase of Calculations**

The idea is to use the given specifications to find the proper gm values for transistors and to use those values to find the corresponding **ID** values. These values can then be used to find the transistor dimensions. **The following table shows the values of** gm, ID and W/L for different transistors.

gm1 and gm2 can be found on the basis of GBW and Cc (the compensation capacitance) specifications as follows. (Given that Cc = CL)

\[g_{m1} = g_{m2} = 2*\pi*GBW*C_{C}\]

The numerical value has been quoted in the table.

ID5 can calculated on the basis of Slew Rate (SR) and Cc specifications as follows.

\[I_{D5} = SR*Cc\]

The numerical value has been quoted in the table.

Using these values the dimensions for transistors M1 and M2 can now be easily found using the following equation:

\[\frac{W_1}{L_1} = \frac{W_2}{L_2} = \frac{g_{m1}^2}{2*I_{D5}*kn}\]

The numerical values have been quoted in the table.

gm6 and ID7 can be calculated from the gm1 and ID5 info.

\[g_{m6} = 3*g_{m1}\]

and

\[I_{D6} = I_{D7} = 2.5*I_{D5}\]

The numerical values have been quoted in the table.

Now, to verify the gain value, we will substitute values into the following gain expression.

\[A_0 = \frac{g_{m1}*g_{m6}}{(g_{ds2}+g_{ds4})*(g_{ds6}+g_{ds7})}\]

Where:

\[g_{ds} = \lambda*I_D\]

Hence, gain expression will become:

\[A_0 = \frac{g_{m1}*g_{m6}}{(\lambda_n*0.5*I_5+\lambda_p*0.5*I_5)*(\lambda_n*2.5*I_5+\lambda_p*2.5*I_5)}\] \[A_0 = 69.66 dB\]

Hence, the gain specification is satisfied.

The values of gm3 and gm4 can be calculated from gm6 value with the information of relative dimensions of M4 and M6. Such that, \[\frac{\frac{W_4}{L_4}}{\frac{W_6}{L_6}} = \frac{1}{5}\] Hence,

\[g_{m3} = g_{m4} = \frac{g_{m6}}{5}\]

The numerical values have been quoted in the table.

The dimensions of M3 and M4 can now be easily calculated as:

\[\frac{W_3}{L_3} = \frac{W_4}{L_4} = \frac{g_{m3}^2}{2*I_{D5}*kp}\]

The numerical values have been quoted in the table.

Finally, the dimensions of M6 are specified as:

\[\frac{W_6}{L_6} = 5*\frac{W_4}{L_4}\]

The numerical values have been quoted in the table.

Now for the dimensions of M5.

\[\frac{W_5}{L_5} = \frac{I_{D5}}{kn*0.5*V_{DSATn}^2}\]

For the dimensions of M7, it can be proved that:

\[\frac{W_7}{L_7} = \frac{2.5*W_5}{L_5}\]

The numerical values have been quoted in the table.

**Improving the Frequency Compensation**

For the Resistance calculation, we use:

\[R_c = \frac{2}{g_{m6}}\] \[R_c = 1.42 K\Omega\]

For M8 dimensioning, we start by finding VD8 in Linear region as:

\[V_{D8} = V_{DD}-V_{SG}\]

Where:

\[V_{SG} = V_{tp}+ \sqrt[]{\frac{0.5*I_{D5}}{0.5*K_p*\frac{W_4}{L_{4}}}}\]

Hence:

\[V_{D8} = 2.2 V\]

And finally the dimensions of M8 are:

\[\frac{W_8}{L_8} = \frac{1}{2*kp*R_c*(V_{D8}-V_{tp})}\] \[\frac{W_8}{L_8} = 11.28\]

**2.2.3 Questions about the open loop AC Simulation**

**1. What are the operating points? At which states (saturation, linear) the transistors are operating?**

**The following table shows the operation points of all the transistors.**

Initially, all the transistors were operating in saturation state except for transistors M8 and M5, who were in linear state. The transistor M5’s dimensions were then tuned to 4 instead of the previous calculation of 3. As a result M5 moved to the saturation state but M7 changed to linear case as evident from the relation between the dimensions of M5 and M7. So M7 was also tuned from the previous value of 10 to 18.75 .As a result, all the transistors were in saturation, except for M8, which was in linear, as expected. All this process was actually done to avoid the recalculation of the entire pre-exercise.

**2. What is the -3dB frequency of the op amp?**

2.006 KHz

**3. What is the DC gain?**

75.21 dB

**4. What is the unity-gain frequency?**

18.98 MHz

**5. What are the gain and phase margins?**

Gain Margin = 26.33 dB

Phase Margin = 180-60.477=119.5 degrees

**6. How the results agree with the calculations? You can for example make a comparison table to the final report.**

**The results obtained are quite close to the calculations as evident from the following table.**

**2.3.1 Questions about the closed-loop simulation**

**1. What does the resulting step response look like (i.e. is there ringing in the step response)?**

Answer

**2. What is the relationship between phase margin and ringing of an operational amplifier (see [1] p.255)?**

Answer

**3. Does the step response agree with the theory in [1] and [2]?**

Answer

**4. What is the output voltage in steady state?**

Answer

**3.2.1 Questions about corner simulations of the open-loop configuration**

**1. What are minimum and maximum phase margins? Under which temperature and process corner conditions minimum and maximum appears?**

Answer

**2. What are minimum and maximum -3dB frequencies?**

Answer

**3. What are minimum and maximum unity-gain frequencies?**

Answer

**3.3.1 Questions about corner simulations of the closed-loop configuration**

**1. What are minimum and maximum settling times?**

Answer

**4.1 Questions about the noise analysis**

**1. What is the input-referred noise density (dB/Hz) at 100 Hz? What about 1 MHz?**

Answer

**2. At which frequency the thermal noise starts to dominate the total noise contribution?**

Answer

**5.1 Questions about the harmonic distortion**

**1. What difference can be seen between output waveforms?**

Answer

**2. What differences can be seen between spectra?**

Answer

**3. What are magnitudes (dB) of the second and third harmonic distortion components in these two cases?**

Answer

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