FPGA Lab 7
Lab 7 instructed me to build an 8-bit triangle-wave and sine-wave generator. After building the triangle-wave generator I designed a sine-wave generator by using the output of the triangle wave as the read address for a ROM block which had the appropriate values in order to generate a since wave over the correct period. This lab was extremely useful in demonstrating how one can use a ROM block in order to save data that needs to be reproduced at a later time, an extremely common task in designing complicated circuits.
Lab 7 instructed me to design a signal generator capable of producing two different kinds of signals: triangle and sine. In order to construct the triangle generator, I used an updown counter which switched at the half period of the generated wave. the only challenged that I encountered while desinging this was to find a way to have the counter switch at a particular value. This was accomplished using an S/R flip flop. In order to have the triangle wave oscillate with a particular frequency, I connected the 5th bit of a counter which changes every \(2^5\) clock cycles. For the 50 MHz clock driving the FPGA, this corresponded to a frequency of 1.3 KHz. I then was able to turn the triangle wave generator into a sine wave by connecting the output of the triangle wave to a ROM block which had the necessary values to generate it. As this lab was relatively short and the FPGA has an on board codec, there were not many obstacles that I encountered while designing this circuit. I was able to easily test my design by attaching the audio jack to an osciliscope and verifying the waveform.