\documentclass[10pt]{article}

\usepackage{fullpage}
\usepackage{setspace}
\usepackage{parskip}
\usepackage{titlesec}
\usepackage[section]{placeins}
\usepackage{xcolor}
\usepackage{breakcites}
\usepackage{lineno}
\usepackage{hyphenat}





\PassOptionsToPackage{hyphens}{url}
\usepackage[colorlinks = true,
            linkcolor = blue,
            urlcolor  = blue,
            citecolor = blue,
            anchorcolor = blue]{hyperref}
\usepackage{etoolbox}
\makeatletter
\patchcmd\@combinedblfloats{\box\@outputbox}{\unvbox\@outputbox}{}{%
  \errmessage{\noexpand\@combinedblfloats could not be patched}%
}%
\makeatother


\usepackage{natbib}




\renewenvironment{abstract}
  {{\bfseries\noindent{\abstractname}\par\nobreak}\footnotesize}
  {\bigskip}

\titlespacing{\section}{0pt}{*3}{*1}
\titlespacing{\subsection}{0pt}{*2}{*0.5}
\titlespacing{\subsubsection}{0pt}{*1.5}{0pt}


\usepackage{authblk}


\usepackage{graphicx}
\usepackage[space]{grffile}
\usepackage{latexsym}
\usepackage{textcomp}
\usepackage{longtable}
\usepackage{tabulary}
\usepackage{booktabs,array,multirow}
\usepackage{amsfonts,amsmath,amssymb}
\providecommand\citet{\cite}
\providecommand\citep{\cite}
\providecommand\citealt{\cite}
% You can conditionalize code for latexml or normal latex using this.
\newif\iflatexml\latexmlfalse
\providecommand{\tightlist}{\setlength{\itemsep}{0pt}\setlength{\parskip}{0pt}}%

\AtBeginDocument{\DeclareGraphicsExtensions{.pdf,.PDF,.eps,.EPS,.png,.PNG,.tif,.TIF,.jpg,.JPG,.jpeg,.JPEG}}

\usepackage[utf8]{inputenc}
\usepackage[T2A]{fontenc}
\usepackage[polish,ngerman,english]{babel}



\usepackage{float}








\begin{document}

\title{Design of a 21-level multilevel inverter with minimum number of devices
count}



\author[1]{Hasan Hatas}%
\author[2]{Murat Karakılıç}%
\author[1]{Mehmet ALMALI}%
\affil[1]{Van Yuzuncu Yil University}%
\affil[2]{Igdir University}%


\vspace{-1em}



  
  \date{May 30, 2024}


\begingroup
\let\center\flushleft
\let\endcenter\endflushleft
\maketitle
\endgroup





\selectlanguage{english}
\begin{abstract}
Multilevel inverters (MLIs) have attracted the attention of researchers
for their needs in industrial applications, renewable energy systems,
and electric vehicles. MLIs require a large number of power electronic
components to synthesize higher levels at the output voltage. However,
overuse of power electronic devices increases the complexity, losses,
and cost of MLIs. In this study, a new MLI has been proposed with a
reduced number of power switches. The basic unit of the proposed MLI
comprises only three independent DC sources and ten switches (eight
unidirectional, and two bidirectional) to produce 21 levels at the
output voltage waveform. The nearest level control (NLC) modulation
method has been used to produce gate pulses. Furthermore, three
extension topologies have been proposed to generate a higher number of
levels and the extension parameters have been compared with recently
introduced and conventional topologies. The comparative study shows that
the proposed MLI topology requires fewer components in terms of power
electronics parameters than the others. On the other hand, the presented
first extension study can be used for all non-extendable basic units is
one of the prominent values of the study. Simulation studies showing
modulation methods, switching patterns, and signal outputs were
performed with Matlab/Simulink. A prototype of the proposed main module
has been realized and tested in the laboratory with an FPGA processing
board. Experimental results have been verified with simulation results,
and the performance of the proposed topology has been proven.%
\end{abstract}%



\sloppy




\selectlanguage{english}
\FloatBarrier
\end{document}

