IV.  AMBA AXI
The AMBA AXI protocol supports high-performance, high-frequency system designs in addition of being suitable for high-bandwidth and low-latency designs with backward-compatible with existing AHB and APB interfaces. [20]
 
• Separate address/control and data phases .
• Support for unaligned data transfers, using byte strobes .
• Separate read and write data channels, that can provide low-cost Direct Memory Access   (DMA), 5 channels each transfer in one direction.
• Support for out-of-order transaction completion .
• The AXI protocol includes the optional extensions that cover signaling for low-power  operation. [20]
 
The AXI protocol is burst-based and defines the following independent transaction channels: