An address channel carries control information that describes the nature of the data to be transferred. The data is transferred between master and slave using either:
 
    Each of the independent channels consists of a set of information signals and VALID and READY signals that provide a two-way handshake mechanism. The information source uses the VALID signal to show when valid address, data or control information is available on the channel. The destination uses the READY signal to show when it can accept the information. Both the read data channel and the write data channel also include a LAST signal to indicate the transfer of the final data item in a transaction. The appropriate address channel carries all of the required address and control information for a transaction.
 
All five transaction channels use the same VALID/READY handshake process to transfer address, data, and control information. This two-way flow control mechanism means both the master and slave can control the rate at which the information moves between master and slave. Transfer occurs only when both the VALID and READY signals are HIGH. [20]
   1. Read data channel
The read data channel carries both the read data and the read response information from the slave to the master, and includes:
• The data bus, that can be 8, 16, 32, 64, 128, 256, 512, or 1024 bits wide
• A read response signal indicating the completion status of the read transaction. [20]
 
2. Write data channel
    The write data channel carries the write data from the master to the slave and includes:
    • the data bus, that can be 8, 16, 32, 64, 128, 256, 512, or 1024 bits wide
    • a byte lane strobe signal for every eight data bits, indicating which bytes of the   data are valid.
    Write data channel information is always treated as buffered, so that the master can perform write    transactions without slave acknowledgement of previous write transactions. [20]