# Introduction

Nanowires (NW) are being extensively studied due to their potential for novel electronic, photonic, thermal, electrochemical and mechanical properties.(Yang 2010) (Dasgupta 2014) (Li 2006) There does not seem to be a limit to the innovative electronic designs that are being created to test the limits of these properties. This article reviews the most recent electronics that have been designed using Gallium Arsenide (GaAs) nanowires. Within the last 5 years Gallium Arsenic (GaAs) nanowires have been explored for a myriad of possible devices including, transistors, photo-detectors, LED, solar cells, nanolasers, thermoelectric and piezoelectric devices.

# Transistors

Transistors are at the heart of any electronic device. Of course, in order to make smaller devices the transistors must scale accordingly. NW’s small dimensions naturally make it a candidate for transistor fabrication. In particular GaAs NW are of interest due to having high charge carrier mobility, a desirable trait for devices such as microchips, which has historically been dominated by Si technology. Miao and coworkers have recently done record breaking work by creating GaAs NW arrays in planar (as opposed to typical vertical) form for T-gated high electron mobility transistors (HEMTs).(Miao 2014) A 1.5x1.5 $$cm^2$$ chip with 115 planar HEMTS was fabricated and characterized in terms of its DC current-voltage characteristics and radio frequency (RF) performance. Growth methods included etching alignment markers on a GaAs substrate with iductively coupled plasma, depositing Au seeds (100nm diameter and 300nm seperation distance) and VLS growth.(Miao 2013) Characterization testing found $$\frac{f_t}{f_{max}}=\frac{33}{75}GHz$$ and $$\frac{I_{on}}{I^{off}}=10^4$$. The GaAs NW chip greatly outperfroms other current NW, carbon nanotube, or graphene Field Effect Transistors (FET) (Figure \ref{fig:best}). (Miao 2014)

\label{fig:best} A log-linear plot of DC performance vs RF performance. The GaAs NW perform orders of magnitude better than previous fabrications. Gate length (L_G) Figure 5 from reference (Miao 2014)