AND
Figure 2.15: Multiplexer (MUX structure) includes two ANDs, one NOT and
one OR gates
with three MUXes in Digital to Stochastic converter, there are 6
AND, 3 NOT (Converter) and 3 OR gates. Meanwhile, the method introduced
by Gaines needs 9 NANDs and 2 converter for the same implementation. It
is obvious to see that the hardware cost of two converters is
approximately equal. Consequently, it can be concluded that both
approaches give us a same quality in generating stochastic number,
however, the second one can be a better candidate if there is strict
requirements in error evaluation.
LFSR is recently considered as an approach that satifies the random and
uncorrelated requiremen[12]
introduced Weighted binary SNG based on this technique. Based on
4–bit version of the Weighted
Binary SNG (WBG) that Gupta and Kumaresan introduced for stochastic
multiplication, we will consider a 10–bit version which produced
a stochastic sequence of length 1024. Because a short stochastic
sequence (4–bit version corresponds to a length 16) is not
evently amenable in almost stochastic application. In this
configuration, the prefered LFSR have n stages and a maximum
cycle
through N = 2n − 1 distinct states. Note that, in order to
achieve the maximum cycle or m–sequence
of a LFSR, an nth order primitive polynomial must be definitely
applied in feedback path. In our
implementation for 10 bit WBG, f (x) = x9 +
x8 + x6 + x5 is used as such primitive polynomial.
ochastic
umber
Binary number
Figure 2.16: 10–bit Weighted Binary SNG
Fig.2.16 shows the circuit of our
investigated scenario. In this design, as proved in
[12], the values w:
w9, w8, w7, w6, w5, w4,
w3, w2, w1, w0 correspond to the weighted
values of 1/21, 1/22, 1/23, 1/24,
1/25, 1/26, 1/27, 1/28, 1/29,
1/210. Therefore, it can be instantly implied that the output
stochastic value xstochastic exactly determines the binary value
x as follows
9
xstochastic = . wix [i] (2.15)
i=0
For instance, when the input value in binary format is x =
0.1100110011 (corresponding a real value 819/1024 ≈
0.8), LFSR is initialised by any value so that the all–0
state is excluded, we will obtain a
stochastic sequence which represent precisely the value x after
1024 clock cycle. Clearly, this method
inherently gives a highly accurate result in generating stochastic
numbers. Moreover, it is considerable in comparing this technique with
other approach using the PRNG and comparator in which a LFSR (if used as
PRNG) need to have more states.
We continue considering two operators Multiplier and Adder
by using this approach as stochastic sources. In applying different
initial value for LFSRs in SN1 and SN2 which encode two
expected
value 0.3 and 0.7 respectively, the received results are
0.21 (expected value is 0.7 ∗ 0.3 =
0.21) and
adder. Using Stochastic computing, these results can be
acceptable in many applications which do not require a high accuracy.
Besides, the authors in [12]
also introduced a multiplier based on WBG in which a double–length LFSR
will be investigated. In this work, we would like to propose the
triple-length LFSR based Stochastic scale adder that is
illustrated in Fig.2.18. This
configuration is composed of a 30–stages LFSR which