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An Energy-Efficient Computing-in-Memory circuit based on Multiplexing-Computing-Cell for BNN acceleration
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  • Zhenwei Zhang,
  • Zilin Wang,
  • Hongyang Luo,
  • Yajuan He
Zhenwei Zhang
University of Electronic Science and Technology of China
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Zilin Wang
University of Electronic Science and Technology of China
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Hongyang Luo
University of Electronic Science and Technology of China
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Yajuan He
University of Electronic Science and Technology of China

Corresponding Author:[email protected]

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Abstract

This brief presents an energy-efficient Computing-in-Memory (CIM) circuit based on novel Multiplexing-Computing-Cell. The proposed circuit is capable of XNOR-and-accumulation (XAC) operations for binary neural network (BNN). To reduce the delay and power consumption of the result readout circuit, this circuit uses an all-digital adder tree circuit based on an alternating structure of 11T full adder and 28T full adder. This letter builds a 32Kb (512x64) size CIM circuit and achieves 98.3% accuracy in MNIST dataset, with a latency of 3.5ns and an energy efficiency of 56.4TOPS/W.