Abstract
This article presents a time domain multiply-and-accumulate (MAC) engine
used for convolutional neural networks. Time domain is chosen for
efficiency as it allows for compact representation of multi-bit inputs
on a single wire. This reduces gate count and switching capacitance
(Cdyn) compared to traditional all-digital implementation. The inputs
are encoded by selecting a pulse of varying width depending on input
code. The multiplication operation and accumulation is implemented using
a digitally controlled switched-ring oscillator time-to-digital
converter functioning as a time accumulator. The digital control allows
for accumulation and quantization of two signals simultaneously, halving
the required time to quantize a certain value. The proposed MAC is
designed in a 28nm CMOS process and can achieve a simulated power
efficiency of 0.32pJ/b, which is 1.8X better than what can be achieved
by a single input gated ring oscillator (GRO) design.