Abstract
Switched capacitor array (SCA) circuits allow a fast acquisition of
short signals as samples in memory cells, being an alternative to
conventional converter circuits. Each memory cell of an SCA has a
readout buffer circuit needed only during a short time, thus wasting
power when is left ON. Presented is the design of a power cycling
circuit that greatly reduces power consumption of SCA circuits by
turning buffers ON only when needed. Results from circuit simulations of
a prototype implementation are presented. The reduction on power
consumption of SCA circuits with power cycling are computed from the
results and compared to conventional circuits.