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Energy-efficient and high-resolution switching scheme based on previous significant bit capacitor for bottom-plate sampled SAR ADC
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  • Peiyuan Wan,
  • zeyang Li,
  • Zhijie Chen,
  • Xu Liu
Peiyuan Wan
Beijing University of Technology

Corresponding Author:[email protected]

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zeyang Li
Beijing University of Technology
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Zhijie Chen
Beijing University of Technology
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Xu Liu
Beijing University of Technology Faculty of Information Technology
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Abstract

An energy-efficient and high-resolution switching scheme based on previous significant bit capacitor for bottom-plate sampled successive approximation register (SAR) analog-to-digital converters (ADC) is proposed. The process of obtaining the most significant bit (MSB) does not consume switching energy, and all the rest of comparisons adopt the switching technology based on previous significant bit. This technique switches the Vref/2 of the previous significant bit switching capacitors on only one side of the capacitors and only consumes little switching energy. Furthermore, fewer capacitors switch to GND throughout the switching process, consuming less energy compared to Tri-level switching scheme. The proposed scheme in this paper can achieve 25% savings in switching energy compared to the Tri-level switching scheme, and reduce the switching energy by 81.2% compared to the Vcm-based switching technique.