Design of capacitor-less LDO regulator with NLRSCR based high robustness
ESD protection circuit using dynamic feedback loop for low-voltage
applications
Abstract
The capacitor-less low dropout voltage regulator applied to mobile
devices increases the power consumption due to the continuously exposed
peak voltage. The dynamic feedback loop for the LDO regulator proposed
in this study can provide a function to stably control the peak voltage
regardless of the change in the load current. The performance of chip
layout maintains an output voltage of 3V with a battery input voltage of
3.3-4.5V and a load current of 350mA. The peak voltage was maintained
the undershoot voltage of 30mV and the overshoot of 33mV regardless of
the change in the load current. In addition, circuit damage due to ESD
(Electro Static Discharge) may occur frequently due to the increase of
applications using low voltage along with miniaturization and
integration of IC. This is an important factor affecting the overall
reliability related to the productivity and stability. As a result, it
was confirmed that the proposed LDO regulator secures high reliability
at low voltage by applying the ESD protection circuit of the NLRSCR
structure.